december 2011 ? 2004 fairchild semiconductor corporation www.fairchildsemi.com fsa1256(a) / fsa1257(a) / fsa1258(a) rev. 1.0.6 fsa1256(a) / fsa1257(a) / fsa1258(a) ? low-r on low-voltage, dual spdt analog switch with low-i cct ?a? option fsa1256(a) / fsa1257(a) / fsa1258(a) low-r on low-voltage, dual spdt analog switch with low-i cct ?a? option features ? fsa1256a, fsa1257a, fsa1258a feature low i cct when s input is lower than v cc ? maximum 1.1 ? on resistance (r on ) for 4.5v supply ? 0.4 ? max r on flatness for 4.5v supply ? space-saving pb-free micropak? packaging ? broad v cc operating range: - fsa1256, fsa1257, fsa1258: 1.65v to 5.5v - fsa1256a, fsa1257a, fsa1258a: 2.7v to 5.5v ? fast turn-on and turn-off times ? fsa1258, fsa1258a feature break-before-make enable circuitry ? over-voltage tolerant ttl-compatible control input applications ? cell phone, pda, digital camera, and notebook ? lcd monitor, tv, and set-top box description the fsa1256, fsa1256a, fsa1257, fsa1257a, fsa1258, and fsa1258a are high performance dual single-pole / single-throw (spst) analog switches. all devices feature ultra-low r on of 1.1 ? maximum at 4.5v v cc . the fsa1256, fsa1257, and fsa1258 operate over a wide v cc range of 1.65v to 5.5v. the fsa1256a, fsa1257a, and fsa1258a operation range is 2.7v to 5.5v. these devices are fabricated with sub-micron cmos technology to achieve fast switching speeds and are designed for break-before-make operation. the select input is ttl level compatible. the fsa1256 and fsa1256a feature two normally open (no) switches. the fsa1257 and fsa1257a feature two normally closed (nc) switches. the fsa1258 and fsa1258a have one no switch and one nc switch. important note: for additional performance information, please contact analogswitch@fairchildsemi.com . ordering information part number top mark package description packing method FSA1256L8X eb 8-lead, micropak?, 1.6mm wide 5000 units t ape and reel fsa1256al8x fn 8-lead, micropak?, 1.6mm wide 5000 units t ape and reel fsa1257l8x ec 8-lead, micropak?, 1.6mm wide 5000 units t ape and reel fsa1257al8x fp 8-lead, micropak?, 1.6mm wide 5000 units t ape and reel fsa1258l8x ed 8-lead, micropak?, 1.6mm wide 5000 units t ape and reel fsa1258al8x fs 8-lead, micropak?, 1.6mm wide 5000 units t ape and reel micropak? is a trademark of fairchild semiconductor corporation.
? 2004 fairchild semiconductor corporation www.fairchildsemi.com fsa1256(a) / fsa1257(a) / fsa1258(a) rev. 1.0.6 2 fsa6157 / fsa6157t ? low-r on spdt (0.8 ? figure 1. fsa1256, fsa1256a figure 2. fsa1257, fsa1257a truth tables control input (s) function control input (s) function low logic level disconnect low logic level a connected to b high logic level a connected to b high logic level disconnected 4 3 2 1 5 6 7 8 1a vcc 1s 2b 2a 1b 2s gnd figure 3. fsa1258, fsa1258a truth table control input, 1s function control input 2s function low logic level 1a connected to 1 b low logic level disconnect high logic level disconnect high logic level 2a connected to 2b pin descriptions name description a, b 0 , b 1 data ports s switch select pin
? 2004 fairchild semiconductor corporation www.fairchildsemi.com fsa1256(a) / fsa1257(a) / fsa1258(a) rev. 1.0.6 3 fsa6157 / fsa6157t ? low-r on spdt (0.8 ? stresses exceeding the absolute maximum ratings may dam age the device. the device may not function or be operable above the recommended operating conditions and st ressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recomm ended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. units v cc supply voltage -0.5 6.0 v v s switch voltage (1) -0.5 v cc +0.5 v v in input voltage (1) -0.5 6.0 v power dissipation at 85 ? c, micropak? 8l package 180 mw i ik input diode current -50 ma i sw switch current 200 ma i swpeak peak switch current (pulsed at 1ms duration, <10% duty cycle) 400 ma t stg storage temperature range -65 +150 ? c t j maximum junction temperature +150 ? c t l lead temperature (soldering 10 seconds) +260 ? c esd human body model (jedec: jesd22-a114) fsa1256, fsa1257, fsa1258 5.5 kv fsa1256a, fsa1257a, fsa1258a 4.5 note: 1. input and output negative ratings ma y be exceeded if input and output di ode current ratings are observed. recommended operating conditions the recommended operating conditions table defines the conditions for ac tual device operation. recommended operating conditions are specified to ens ure optimal performance to the datashee t specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. units v cc supply voltage fsa1256, fsa1257, fsa1258 1.65 5.50 v fsa1256a, fsa1257a, fsa1258a 2.70 5.50 v in control input voltage ( error! reference source not found. ) 0 v cc v v in switch input voltage 0 v cc v ja thermal resistance in still air, micropak 8l package (modeled) 224 c/w t a operating temperature -40 +85 oc note: 2. unused inputs must be held high or low. they must not float.
? 2004 fairchild semiconductor corporation www.fairchildsemi.com fsa1256(a) / fsa1257(a) / fsa1258(a) rev. 1.0.6 4 fsa6157 / fsa6157t ? low-r on spdt (0.8 ? all typical values are at 25oc unless otherwise specified. the 1.65v to 1.95v range applies to fsa1256, fsa1257, and fsa1258 only. symbol parameter conditions v cc (v) t a =+25c t a =-40 to +85c unit min. typ. max. min. max. v ih input voltage high (3) 4.5 to 5.5 2.4 v 2.7 to 3.6 2.0 1.65 to 1.95 0.9 v il input voltage low (3) 4.5 to 5.5 0.8 v fsa1256a, fsa1257a, fsa1258a only 2.7 to 3.6 0.4 fsa1256, fsa1257, fsa1258 only 2.7 to 3.6 0.6 1.65 to 1.95 0.4 i in control input leakage (s) v in =0 to v cc 1.95 to 5.5 -1 1 a i no(0ff) , i nc(0ff) off leakage current a=1v, 4.5v 1b or 2b=1v, 4.5v 5.5 -2 2 -20 20 na r on switch on resistance (3,4) i out =100ma, 1b or 2b=3.5v 4.5 0.95 1.15 1.30 ? i out =100ma, 1b or 2b=1.5v 2.7 2.6 4.0 4.3 i out =100ma, 1b or 2b=1.2v 1.65 8.0 9.5 10.5 ? r on on resistance matching between channels (3,5) i out =100ma, 1b or 2b=3.5v 4.5 0.06 0.12 0.15 ? r flat(on) on resistance flatness (3,6) i out =100ma, 1b or 2b=0v, 1.0v, 2.0v 4.5 0.2 0.3 0.4 ? i out =100ma, 1b or 2b=0v, 0.75v, 1.5v 2.7 1.4 i out =100ma, 1b or 2b=0v, 1.0v, 1.2v 1.65 1.8 i cc quiescent supply current v in =0v or v cc , i out =0v 5.5 0.1 0.5 1.0 a 3.6 0.1 0.5 1.0 i cct increase in i cc per input one input at 2.6v, others at v cc or gnd (fsa1256a, fsa1257a, fsa1258a only) 4.3 0.2 10.0 a notes: 3. guaranteed, but not tested for v cc =1.65v. 4. on resistance is determined by the voltage drop betw een a and b pins at the indicat ed current through the switch. 5. ? r on =r on max ? r on min measured at identical v cc , temperature, and voltage. 6. flatness is defined as the difference between the maximum and minimum value of on resistance (r on ) over the specified range of conditions.
? 2004 fairchild semiconductor corporation www.fairchildsemi.com fsa1256(a) / fsa1257(a) / fsa1258(a) rev. 1.0.6 5 fsa6157 / fsa6157t ? low-r on spdt (0.8 ? ac electrical char acteristics all typical values are at 25oc unless otherwise specified. the 1.65v to 1.95v range applies to fsa1256, fsa1257, and fsa1258 only. symbol parameter conditions v cc (v) t a =+25oc t a =-40 to +85c unit figure min. typ. max. min. max. t on turn-on time (7) 1b or 2b=3.0v, r l =50 ? , c l =35pf 4.5 to 5.5 10 35 40 ns 8 1b or 2b=1.5v, r l =50 ? , c l =35pf 2.7 to 3.6 15 50 60 1b or 2b=1.0v r l =50 ? , c l =35pf 1.65 to 1.95 35 110 120 t off turn-off time (7) 1b or 2b=3.0v, r l =50 ? , c l =35pf 4.5 to 5.5 4 15 20 ns 8 1b or 2b=1.5v, r l =50 ? , c l =35pf 2.7 to 3.6 8 20 30 1b or 2b=1.0v r l =50 ? , c l =35pf 1.65 to 1.95 10 30 40 t bbm break-before- make time (7) 1b or 2b=3.0v, r l =50 ? , c l =35pf 4.5 to 5.5 7 ns 9 1b or 2b=1.5v, r l =50 ? , c l =35pf 2.7 to 3.6 12 q charge injection (7) c l =1.0nf, v gen =0v, r gen =0 ? 4.5 to 5.5 20 pc 13 2.7 to 3.6 10 1.65 to 1.95 5 oirr off isolation (7) f=1mhz, r l =50 ? , 1.65 to 5.5 -70 db 11 xtalk crosstalk (7) f=1mhz, r l =50 ? , 1.65 to 4.3 -100 db 12 bw -3db bandwidth (7) r l =50 ? 1.65 to 4.3 300 mhz 10 thd total harmonic distortion (7) f=20hz to 20khz, r l =600 ? , v in =0.5v pp 1.65 to 4.3 0.002 % 16 notes: 7. guaranteed, but not tested for v cc =1.65v. capacitance symbol parameter conditions v cc (v) t a =+25oc unit figure min. typ. max. c in control pin input capacitance f=1mhz 0 3.0 pf 15 c off b port off capacitance f=1mhz 4.5 11.5 pf 14 c on a port on capacitance f=1mhz 4.5 27.0 pf 15
? 2004 fairchild semiconductor corporation www.fairchildsemi.com fsa1256(a) / fsa1257(a) / fsa1258(a) rev. 1.0.6 6 fsa6157 / fsa6157t ? low-r on spdt (0.8 ? select b0,b1 a v s = 0 or v cc i on v on r on =v on /i on gnd v sw gnd v select = 0 or v cc nc a i a(off) v in gnd i v in v in v s figure 4. on resistance figure 5. off leakage (ports tested separately) selec t v s =0 or v cc nc i a(on) v in gnd a v in v r l c l nb n na gnd gnd r s v sel v in gnd v out figure 6. on leakage figure 7. test circuit load t rise =2.5ns gnd v cc 90% 90% 10% 10% t fall = 2.5ns v cc /2 v cc /2 input - v sel output- v out 90% v oh v ol t on t off 90% t fall - - - figure 8. turn-on / turn-off waveforms
? 2004 fairchild semiconductor corporation www.fairchildsemi.com fsa1256(a) / fsa1257(a) / fsa1258(a) rev. 1.0.6 7 fsa6157 / fsa6157t ? low-r on spdt (0.8 ? (continued) v cc v cc /2 t d 0v v out input -v sel 0.9*v out t rise =2.5ns 90% 10% c l b0 b1 n r l na gnd gnd r s v sel v sw gnd v out v in gnd v - - v sel r l and c l are functions of the application environment (50, 75, or 100 ). c l includes test fixture and stray capacitance. 0.9*v out figure 9. break-before-make interval timing v out gnd gnd r t gnd gnd v s r s network analyzer v s gnd r s and r t are functions of the application environment (50, 75, or 100 ). v in figure 10. bandwidth v out gnd gnd r t gnd gnd v s r s network analyzer r t gnd v sel gnd off isolation= 20 log (v out / v in ) t r s and r t are functions of the application environment (50, 75, or 100 ). figure 11. channel off isolation
? 2004 fairchild semiconductor corporation www.fairchildsemi.com fsa1256(a) / fsa1257(a) / fsa1258(a) rev. 1.0.6 8 fsa6157 / fsa6157t ? low-r on spdt (0.8 ? (continued) r s and r t are functions of the application environment (50, 75, or 100 ). v out gnd gnd r t gnd gnd v s r s network analyzer r t gnd v sel gnd crosstalk = 20 log (v out / v in ) v in figure 12. adjacent channel crosstalk r s v out q = ? v out ? c l ? v out v out v cc 0v input ? v sel generator gnd v s c l v sel v in b ns n gnd c l includes test fixture and stray capacitance gnd off on off ma figure 13. charge injection test b0 n b1 capacitance meter select b0,b1 f=1mhz v s = 0 or v cc nb n capacitance meter select f=1mhz v s = 0 or v cc nb n figure 14. channel off capacitance figure 15. channel on capacitance v out gnd gnd r t gnd gnd v s r s audio analyzer v cntrl gnd v in v cntrl =0orvcc r s and r t are functions of the application environment. figure 16. total harmonic distortion
? 2004 fairchild semiconductor corporation www.fairchildsemi.com fsa1256(a) / fsa1257(a) / fsa1258(a) rev. 1.0.6 9 fsa6157 / fsa6157t ? low-r on spdt (0.8 ? physical dimensions (0.09) (0.1) (0.2) 1.6 2x 0.05 0.00 1.6 2x c 0.05 c 4 3. drawing conforms to asme y.14m-1994 2. dimensions are in millimeters 1. package conforms to jedec mo-255 variation uaad bottom view 4. pin 1 flag, end of package offset mac08arev4 1 23 5 6 7 8 notes: 8x 0.25 0.35 3x 8x 1.0 4 0.5 8x 0.25 0.15 0.10 cab 0.05 c 0.10 c top view index area b recommended landpattern a 0.10 c 0.55 max 0.05 c detail a 0.35 0.25 (0.15) (0.20) 0.35 0.25 detail a pin #1 terminal scale: 2x 5. drawing file name: mkt-mac08arev4 figure 17. 8-lead micropak?, 1.6mm wide for tape and reel specificati ons for micropak, please visit: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf package drawings are provided as a service to customers consi dering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packa ging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2004 fairchild semiconductor corporation www.fairchildsemi.com fsa1256(a) / fsa1257(a) / fsa1258(a) rev. 1.0.6 10 fsa6157 / fsa6157t ? low-r on spdt (0.8 ?
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